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MP7614
15 V CMOS Multiplying 14-Bit Digital-to-Analog Converter
FEATURES
* * * * Full Four-Quadrant Multiplication Excellent Stability Over Temperature and Time Guaranteed Monotonic TTL/5 V CMOS Compatible * Low Sensitivity to Output Amplifier VOS * Low Glitch Energy * 16-Bit Version: MP7616
GENERAL DESCRIPTION
The MP7614 is a high density 14-bit CMOS multiplying Digital-to-Analog Converter. Silicon nitride passivation and untrimmed silicon chromium resistors have been combined to provide long term stability and reliability. Using the most significant bit (MSB) segmentation technique, the MP7614 features 13-bit (0.012%) differential and 12-bit (0.01%) integral linearity. To achieve 13-bit linearity without laser trim, the MP7614 digitally decodes the four MSB's into 15 equal current sources,
rather than the standard binary-weighted sources. Each resistor contributes only 1/16 full scale output thus reducing the matching accuracy requirement of the resistor and CMOS switches from 0.0015% to 0.006%. The decoding technique achieves an eightfold improvement in differential linearity stability over temperature, an eightfold improvement in relative accuracy due to aging effects (long term stability), a fourfold improvement in glitch amplitude, and a tenfold reduction in sensitivity to output amplifier offset voltage.
SIMPLIFIED BLOCK DIAGRAM
VDD
VREF
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
10-Bit DAC
IOUT2 IOUT1 To Switches RFB
4 to 15 Decoder
To 10-Bit DAC
GND 1 (MSB) 4 5 14 (LSB)
Rev. 2.00 1
MP7614
ORDERING INFORMATION
Package Type
Plastic Dip Plastic Dip SOIC Ceramic Dip Ceramic Dip
Temperature Range
-40 to +85C -40 to +85C -40 to +85C -40 to +85C -55 to +125C
Part No.
MP7614JN MP7614KN MP7614KS MP7614KD MP7614TD*
INL (LSB)
+4 +2 +2 +2 +2
DNL (LSB)
+4 +2 +2 +2 +2
Gain Error (% FSR)
+0.8 +0.8 +0.8 +0.8 +0.8
*Contact factory for non-compliant military processing
PIN CONFIGURATIONS
See Packaging Section for Package Dimensions
IOUT1 IOUT2 GND (MSB) BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
RFB VREF VDD BIT 14 (LSB) BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8
IOUT1 IOUT2 GND (MSB) BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
RFB VREF VDD BIT 14 (LSB) BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8
20 Pin CDIP, PDIP (0.300") D20, N20
20 Pin SOIC (Jedec, 0.300") S20
PIN OUT DEFINITIONS
PIN NO. 1 2 3 4 5 6 7 8 9 10 NAME IOUT1 IOUT2 GND BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 DESCRIPTION Current Output 1 Current Output 2 Ground Data Input Bit 1 (MSB) Data Input Bit 2 Data Input Bit 3 Data Input Bit 4 Data Input Bit 5 Data Input Bit 6 Data Input Bit 7 PIN NO. 11 12 13 14 15 16 17 18 19 20 NAME BIT 8 BIT 9 BIT 10 BIT 11 BIT 12 BIT 13 BIT 14 VDD VREF RFB DESCRIPTION Data Input Bit 8 Data Input Bit 9 Data Input Bit 10 Data Input Bit 11 Data Input Bit 12 Data Input Bit 13 Data Input Bit 14 (LSB) Positive Power Supply Reference Input Voltage Internal Feedback Resistor
Rev. 2.00 2
MP7614
ELECTRICAL CHARACTERISTICS (VDD = + 15 V, VREF = +10 V unless otherwise noted)
Parameter STATIC PERFORMANCE1 Resolution (All Grades) Integral Non-Linearity5 (Relative Accuracy) J, S K, T Differential Non-Linearity5 J, S K, T Gain Error Gain Temperature Non-Linearity Tempco2 Differential Linearity Tempco2 Coefficient2 N INL +4 +2 DNL +4 +2 GE TCGE 0.8 +1.0 +0.2 +0.2 +5 +1 +50 +10 +4 +2 +0.8 +2.0 +0.5 +0.5 +50 +200 % FSR ppm/C ppm/C ppm/C ppm/% nA Using Internal RFB Gain/Temperature +4 +2 LSB 14 14 Bits LSB Best Fit Straight Line Spec. (Max INL - Min INL) / 2 Symbol Min 25C Typ Max Tmin to Tmax Min Max Units Test Conditions/Comments FSR = Full Scale Range
Power Supply Rejection Ratio Output Leakage Current6
PSRR IOUT
|Gain/VDD| VDD = + 5%
DYNAMIC PERFORMANCE2 Current Settling Time Feedthrough at IOUT1 REFERENCE INPUT Input Resistance DIGITAL INPUTS3 Logical "1" Voltage Logical "0" Voltage Input Leakage Current ANALOG OUTPUTS2 Output Capacitance COUT1 COUT1 COUT2 COUT2 POWER SUPPLY4 Functional Voltage Range2 Supply Current VDD IDD 4.5 15 0.4 16 4 4.5 16 4 V mA 100 50 50 100 pF pF pF pF DAC Inputs all 1's DAC Inputs all 0's DAC Inputs all 1's DAC Inputs all 0's VIH VIL ILKG 3.0 2.4 0.8 +1.0 3.0 0.8 +1.0 V V A RIN 1 3 10 1 10 k tS FT 2 1 2 s mV p-p To 0.01% of FSR; all digital inputs low to high and high to low VREF = 20 V p-p @ 10 kHz
All digital inputs = 0 V or all = 5 V
Rev. 2.00 3
MP7614
ELECTRICAL CHARACTERISTICS (CONT'D)
NOTES: 1 Full Scale Range (FSR) is 10V for unipolar mode. 2 Guaranteed but not production tested. 3 Digital input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur. 4 Specified values guarantee functionality. Refer to other parameters for accuracy. 5 Linearity error is degraded by 65V for every mV of voltage offset at output amplifier.
6
Output leakage current refers to IOUT1. 1 LSB of current constantly flows into IOUT2 (30nA at 5 k input impedance, VREF = +10 V) due to ladder termination into IOUT2.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS (TA = +25C unless otherwise noted)1, 2
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +17 V Digital Input Voltage to GND . . . . GND -0.5 to VDD +0.5 V IOUT1, IOUT2 to GND . . . . . . . . . . . GND -0.5 to VDD +0.5 V VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25 V VRFB to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25 V Storage Temperature . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 seconds) . . . . . . +300C Package Power Dissipation Rating to 75C CDIP, PDIP, SOIC . . . . . . . . . . . . . . . . . . . . . . . . . 900mW Derates above 75C . . . . . . . . . . . . . . . . . . . . . 12mW/C
NOTES: 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short transients outside the supplies of less than 100mA for less than 100s.
APPLICATION NOTES Refer to Section 8 for Applications Information
Rev. 2.00 4
MP7614
20 LEAD CERAMIC DUAL-IN-LINE (300 MIL CDIP) D20
S1 See Note 1
20
S
11
1
10
E1 D Base Plane Seating Plane L b e b1 c L1 Q A E
INCHES SYMBOL A b b1 c D E E1 e L L1 Q S S1 MIN -- 0.014 0.038 0.008 -- 0.220 0.290 MAX 0.200 0.023 0.065 0.015 1.060 0.310 0.320
MILLIMETERS MIN -- 0.356 0.965 0.203 -- 5.59 7.37 MAX 5.08 0.584 1.65 0.381 26.92 7.87 8.13 NOTES -- -- 2 -- 4 4 7 5 -- -- 3 6 6 --
NOTES 1. Index area; a notch or a lead one identification mark is located adjacent to lead one and is within the shaded area shown. 2. The minimum limit for dimension b1 may be 0.023 (0.58 mm) for all four corner leads only. 3. Dimension Q shall be measured from the seating plane to the base plane. 4. This dimension allows for off-center lid, meniscus and glass overrun. 5. The basic lead spacing is 0.100 inch (2.54 mm) between centerlines. 6. Applies to all four corners. 7. This is measured to outside of lead, not center.
0.100 BSC 0.125 0.150 0.015 -- 0.005 0 0.200 -- 0.070 0.080 -- 15
2.54 BSC 3.18 3.81 0.381 -- 0.13 0 5.08 -- 1.78 2.03 -- 15
Rev. 2.00 5
MP7614
20 LEAD PLASTIC DUAL-IN-LINE (300 MIL PDIP) N20
S
20 1 Q1 D
11 10 E1 E A1
Seating Plane
A L B e B1
C
INCHES SYMBOL A A1 B B1 (1) C D E E1 e L MIN -- 0.015 0.014 0.038 0.008 0.945 0.295 0.220 MAX 0.200 -- 0.023 0.065 0.015 1.060 0.325 0.310
MILLIMETERS MIN -- 0.38 0.356 0.965 0.203 24.0 7.49 5.59 MAX 5.08 -- 0.584 1.65 0.381 26.92 8.26 7.87
0.100 BSC 0.115 0 0.055 0.040 (1) 0.150 15 0.070 0.080
2.54 BSC 2.92 0 1.40 1.02 3.81 15 1.78 2.03
Q1 S Note:
The minimum limit for dimensions B1 may be 0.023" (0.58 mm) for all four corner leads only.
Rev. 2.00 6
MP7614
20 LEAD SMALL OUTLINE (300 MIL JEDEC SOIC) S20
D
20
11
E
H
10
h x 45 C Seating Plane e B A1 L A
INCHES SYMBOL A A1 B C D E e H h L MIN 0.097 0.0050 0.014 0.0091 0.500 0.292 MAX 0.104 0.0115 0.019 0.0125 0.510 0.299
MILLIMETERS MIN 2.464 0.127 0.356 0.231 12.70 7.42 MAX 2.642 0.292 0.483 0.318 12.95 7.59
0.050 BSC 0.400 0.010 0.016 0 0.410 0.016 0.035 8
1.27 BSC 10.16 0.254 0.406 0 10.41 0.406 0.889 8
Rev. 2.00 7
MP7614
NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contains here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright EXAR Corporation Datasheet April 1995 Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 2.00 8

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